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| document number: MMA7456L rev 1, 10/2008 freescale semiconductor technical data this document contains certai n information on a new product. specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2008. all rights reserved. 2g/4g/8g three axis low-g digital output accelerometer the MMA7456L is a digital output (i 2 c/spi), low power, low profile capacitive micromachined accelerometer featuring signal conditioning, a low pass filter, temperature compensation, self-test, configurable to detect 0g through interrupt pins (int1 or in t2), and pulse detect for quick motion detection. 0g offset and sensitivity are factory set and require no external devices. the 0g offset can be customer calibrated using assigned 0g registers and g-select which allows for command selection for 3 acceleration ranges (2g/4g/8g). the MMA7456L includes a standby mode that makes it ideal for handheld battery powered electronics. features ? digital output (i 2 c/spi) ? 3mm x 5mm x 1mm lga-14 package ? self-test for z-axis ? low voltage operation: 2.4 v ? 3.6 v ? user assigned registers for offset calibration ? programmable threshold interrupt output ? level detection for motion recogn ition (shock, vibration, freefall) ? pulse detection for single or double pulse recognition ? sensitivity (64 lsb/g @ 2g and @ 8g in 10-bit mode) ? selectable sensitivity (2g, 4g, 8g) for 8-bit mode ? robust design, high shocks survivability (5,000g) ? rohs compliant ? environmentally preferred product ? low cost typical applications ? cell phone/pmp/pda: image stability, te xt scroll, motion dialing, tap to mute ? hdd: freefall detection ? laptop pc: freefall detection, anti-theft ? pedometer ? motion sensing, event recorder ordering information part number temperature range package shipping MMA7456Lt ?40 to +85c lga-14 tray MMA7456Lr1 ?40 to +85c lga-14 7? tape & reel MMA7456Lr2 ?40 to +85c lga-14 13? tape & reel MMA7456L MMA7456L: xyz-axis accelerometer 2g/4g/8g 14 lead lga case 1977-01 bottom view figure 1. pin connections top view 1 2 3 4 5 6 7 8 9 10 11 12 13 14 avdd gnd dvdd_io scl/spc cs int1/drdy int2 n/c sdo sda/sdi/sdo n/c iaddr0 n/c gnd
sensors 2 freescale semiconductor MMA7456L contents electro static discharge (esd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 principle of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 self-test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 g-select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 measurement mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 level detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 $18: control 1 (read/write) setting the detection axes for x, y and z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 $19: control 2 (read/write) motion detection (or condition) or freefall detection (and condition) . . . . . . . . . . . .10 $18: control 1 (read/write): setting the threshold to be an in teger value or an absolute value . . . . . . . . . . . . . . . . .10 $1a: level detection threshold limit value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 threshold detection for motion and freefall conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 case 1: motion detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 case 2: motion detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 case 3: freefall detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 case 4: freefall detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 pulse detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 $18: control 1 (read/write): disable x, y or z for pulse detect ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 $19: control 2 (read/write): motion detect ion (or condition) or freefall detection (and condition) . . . . . . . . . . . . .12 case 1: single pulse motion detect ion: x or y or z > pulse threshold for time < pulse duration . . . . . . . . . . . . . .12 case 2: freefall detection: x and y and z < pulse threshold for time > laten cy time . . . . . . . . . . . . . . . . . . . . . .13 case 3: double pulse detection: x or y or z > threshold for pulse duration1 < pdtime1, latency time, and .14 assigning, clearing & detecting interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 clearing the interrupt pins: register $17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 detecting interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 i 2 c slave interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 spi slave interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 basic connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 recommended pcb layout for interfacing accelerometer to microcont roller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 register definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 soldering and mounting guidelines fo r the lga accelerometer sensor to a pc board . . . . . . . . . 29 sensors freescale semiconductor 3 MMA7456L list of figures pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 simplified accelerometer functio nal block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 simplified transducer physical model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 single pulse detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 freefall detection in pulse mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 double pulse detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 single byte read - the master is reading one address from the MMA7456L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 multiple bytes read - the master is reading multiple sequential registers from the MMA7456L . . . . . . . . . . . . . . . . . . . . . . . . 17 single byte write - the master (mcu) is wr iting to a single register of the MMA7456L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 multiple byte writes - the master (mcu) is writing to multiple sequential registers of the MMA7456L . . . . . . . . . . . . . . . . . . . 17 spi timing diagram for 8-bit register read (4 wire mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 spi timing diagram for 8-bit register read (3 wire mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 spi timing diagram for 8-bit register write (3 wire mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 i 2 c connection to mcu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 spi connection to mcu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 sensing direction and output response at 2g mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 recommended pcb land pattern for the 5 x 3 mm lga package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 incorrect pcb top metal pattern under packa ge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 correct pcb top metal pattern un der package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 recommended pcb land pad, solder mask, and signal trace near pa ckage design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 stencil design guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 sensors 4 freescale semiconductor MMA7456L list of tables pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 function parameters for detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 $16: mode control register (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 configuring the g-select for 8-bit output using register $16 with glvl[1:0] bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 configuring the mode using register $16 with mode[1:0] bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 thopt = 0 absolute; thopt = 1 positive negative . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 $1b: pulse detection threshold limit value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 $1c: pulse duration value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 $1b: pulse detection threshold limit value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 $1d: latency time value (read/wri te) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 $1b: pulse detection threshold limit value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 $1c: pulse duration value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 $1d: latency time value (read/wri te) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 $1e: time window for 2nd pulse value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 $18 control 1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 configuring the interrupt settings using register $18 with intreg [1:0] bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 $17: interrupt latch reset (read /write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 $0a: detection source register (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 user register summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 $00: 10bits output value x lsb (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 $01: 10bits output value x msb (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 $02: 10bits output value y lsb (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 $03: 10bits output value y msb (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 $05: 10bits output value x msb (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 $06: 8bits output value x (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 $07: 8bits output value y (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 $08: 8bits output value z (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 $09: status register (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 $0a: detection source register (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 $0d: i2c device address (bit 6-0: read on ly, bit 7: read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 $0e: user information (read only: optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 $0f: ?who am i? value (read only: optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 $10: offset drift x lsb (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 $11: offset drift x msb (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 $12: offset drift y lsb (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 $13: offset drift y msb (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 $14: offset drift z lsb (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 $15: offset drift z msb (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 $16: mode control register (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 configuring the g-select for 8-bit output using register $16 with glvl[1:0] bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 $17: interrupt latch reset (read /write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 $18 control 1 (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 configuring the interrupt settings using register $18 with intreg [1:0] bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 $1a: level detection threshold limit value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 $1b: pulse detection threshold limit value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 $1c: pulse duration value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 $1d: latency time value (read/wri te) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 $1e: time window for 2nd pulse value (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 acceleration vs. output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 sensors freescale semiconductor 5 MMA7456L table 1. pin descriptions * this address selection capability is not enabled at the default st ate. if the user wants to use it, factory programming is requ ired. if activated (pin4 on the device is active). <$1d= 0001 1101> bit 0 is v dd on pin 4 <$1c=0001 1100> bit 0 is gnd on pin 4. if t he pin is programmed it cannot be left nc. figure 2. simplified acceleromet er functional block diagram pin # pin name description pin status 1 dvdd_io digital power for i/o pads input 2 gnd ground input 3 n/c no internal connection. leave unconnected or connect to ground. input 4 iaddr0 i 2 c address bit 0 (optional)* input 5 gnd ground input 6 avdd analog power input 7cs spi enable (0), i 2 c enable (1) input 8 int1/drdy interrupt 1/ data ready output 9 int2 interrupt 2 output 10 n/c no internal connection. leave unconnected or connect to ground. input 11 n/c leave unconnected or connect to ground. input 12 sdo spi serial data output output 13 sda/sdi/sdo i 2 c serial data (sda), spi serial data input (sdi), 3-wire interface serial data output (sdo) open drain/input/output 14 scl/spc i 2 c serial clock (scl), spi serial clock (spc) input sensors 6 freescale semiconductor MMA7456L electro static discharge (esd) warning: this device is sensitive to electrostatic discharge. although the freescale accelerometer contains internal 2000v esd protection circuitry, extra pr ecaution must be taken by the user to protect the chip from esd. a charge of over 2000 volt s can accumulate on the human body or associated test equipment. a charge of this magnitude can alter the pe rformance or cause failure of the chip. wh en handling the accelerometer, proper esd precautions should be followed to avoid exposing the devic e to discharges which may be detrimental to its performance. table 2. maximum ratings (maximum ratings are the limits to which the device can be exposed without c ausing permanent damage.) rating symbol value unit maximum acceleration (all axes) g max 5000 g analog supply voltage av dd -0.3 to +3.6 v digital i/o pins supply voltage dv dd_io -0.3 to +3.6 v drop test d drop 1.8 m storage temperature range t stg -40 to +125 c sensors freescale semiconductor 7 MMA7456L table 3. operating characteristics unless otherwise noted: ?40c < t a < 85c, 2.4 v < av dd < 3.6 v, acceleration = 0g, loaded output. characteristic symbol min typ max unit analog supply voltage standby/operation mode enable bus mode digital i/o pins supply voltage standby/operation mode enable bus mode av dd av dd dv dd_io dv dd_io 2.4 1.71 1.71 2.8 0 1.8 1.8 3.6 av dd 3.6 v v v v supply current drain operation mode pulse detect function mode standby mode (except data loading and i 2 c/spi communication period) i dd i dd i dd ? ? ? 437 437 2.5 495 495 10 a a a operating temperature range t a -40 25 85 c 0g output signal (t a = 25c, v dd = 2.8 v) 2g range (25c) 8bit 4g range (25c) 8bit 8g range (25c) 8bit 8g range (25c) 10bit -18 -10 -5 -18 0 0 0 0 18 10 5 18 count count count count sensitivity (t a = 25c, v dd = 2.8 v) 2g range (25c) 8bit 4g range (25c) 8bit 8g range (25c) 8bit 8g range (25c) 10bit 58 29 14.5 58 64 32 16 64 70 35 17.5 70 count/g count/g count/g count/g self-test output response zout (8g - 10bit) st z 43 64 82 count tco x y z -3 -3.5 -3 0 0 0 3 3.5 3 mg/c mg/c mg/c tcs x y z -0.02 -0.02 -0.026 0 0 0 0.02 0.02 0.026 %/c %/c %/c input high voltage input low voltage v ih v il 0.7 x dvdd ? ? ? ? 0.35 x dvdd v v internal clock frequency (t a = 25c, av dd = 2.8 v) t clk 140 150 160 khz spi frequency dv dd_io < 2.4 v dv dd_io > 2.4 v ? ? 4 8 ? ? mhz mhz bandwidth for data measurement (user selectable) dfbw 0 dfbw 1 ? ? 62.5 125 ? ? hz hz output data rate output data rate is 125 hz when 62.5 bandwidth is selected. output data rate is 250 hz when 125hz bandwidth is selected. ? ? 125 250 ? ? hz hz control timing wait time for i 2 c/spi ready after power on turn on response time (standby to normal mode) turn off response time (normal to standby mode) self-test response time sensing element resonant frequency xy z t su t ru t rd t st f gcellxy f gcellz ? ? ? ? ? ? 1 ? ? ? 6.0 3.4 ? 20 20 20 ? ? ms ms ms ms khz khz nonlinearity (2 g range) -1 ? +1 %fs cross axis sensitivity -5 ? +5 % sensors 8 freescale semiconductor MMA7456L note: the response time is between 10% of full scale v dd input voltage and 90% of the final operating output voltage. *the bandwidth for detecting interrupts in level and pulse is 600hz which is changed from measurement mode. principle of operation the freescale accelerometer is a surface-micromachined integrated- circuit accelerometer. the devi ce consists of a surface mi- cromachined capacitive sensing cell (g-cell) and a signal cond itioning asic contained in a single package. the sensing element is sealed hermetically at the wafer level using a bulk micromachined cap wafer. the g- cell is a mechanical structure formed fro m semiconductor materials (polysilicon) using semiconductor proc esses (masking and etching). it can be modeled as a set of beams attached to a movable central mass that move between fixed beams. the movable beams can be deflected from their rest position by subjecting th e system to an acceleration ( figure 3 ). as the beams attached to the central mass move, the distance fr om them to the fixed beams on one side will increase by the same amount that the distance to the fixe d beams on the other side decreases. the cha nge in distance is a measure of accel- eration. the g-cell beams form two back-to-back capacitors ( figure 3 ). as the center beam moves with acceleration, the distance between the beams changes and each capacitor's value will change, (c = a /d). where a is the area of the beam, is the di- electric constant, and d is the distance between the beams. the asic uses switched capacitor techniques to measure the g-ce ll capacitors and extract the acceleration data from the differ- ence between the two capacitors. the asic also signal conditions and filters (switched capacitor) the signal, providing a digit al output that is proportional to acceleration. figure 3. simplified transducer physical model features self-test the sensor provides a self-test feature that allows the verification of the mechanical and electrical integrity of the accelero meter at any time before or after installation. this feature is crit ical in applications such as hard disk drive protection where sys tem in- tegrity must be ensured over the life of the product. when the self -test function is initiated through the mode control registe r ($16), accessing the ?self-test? bit, an electrostatic force is applied to each axis to cause it to defl ect. the z-axis is trimmed to deflect 1g. this procedure assures that both the mechanical (g-cell) and electronic sections of the accelerometer are functioning. table 4. function parameters for detection ?40c < t a < 85c, 2.4 v < av dd < 3.6 v, unless otherwise specified characteristic symbol min typ max unit level detection detection threshold range 0 ? fs g pulse detection pulse detection range (adjustable range) time step for pulse detection threshold range for pulses detection levels for threshold latency timer (adjustable range) time window (adjustable range) bandwidth for detecting interrupt* time step for latency timer and time window 0.5 ? 0 ? 1 1 ? ? ? 0.5 ? 127 ? ? 600 1 127 ? fs ? 150 250 ? ? ms ms g counts ms ms hz ms acceleration sensors freescale semiconductor 9 MMA7456L g-select the g-select feature enables the selection between 3 accelerati on ranges for measurement. depending on the values in the mode control register ($16), the MMA7456L?s internal gain will be changed allowing it to function with a 2g, 4g or 8g measureme nt sensitivity. this feature is ideal when a product has applicatio ns requiring two or more acceleration ranges for optimum perfor - mance and for enabling multiple functions. the sensitivity can be changed during the operation by modifying the two glvl bits located in the mode control register. standby mode this digital output 3-axis accelerometer provides a standby mo de that is ideal for battery ope rated products. when standby mode is active, the device outputs are turned of f, providing significant reduction of operating current. when the device is in stand by mode the current will be reduced to 2.5 a typical. in standby mode the device can read and write to the registers with the i 2 c/ spi available, but no new measurements can be taken in this mode as all current consuming parts ar e off. the mode of the device is controlled through the mode control register by accessing the two mode bits as shown in table 6 . measurement mode during measurement mode, continuous measurements on all three axes enabled. the g-range for 2g, 4g, or 8g are selectable with 8-bit data and the g-range of 8g is selectable with 10-bit data. the sample rate during measurement mode is 125 hz with 62.5 bw filter selected. the sample rate is 250 hz with the 125 hz filter selected. therefore, when a conversion is complete (signaled by the drdy flag), the next measurement will be ready. when measurements on all three axes are completed, a logic high level is output to the drdy pin, indicating ?measurement data is ready.? the drdy status can be monitored by the drdy bit in st atus register (address: $09). th e drdy pin is kept high until one of the three output value registers are read. if the next measurement data is written before the previous data is read, the dovr bit in the status register will be set. also note that in measurement mode, level detection mode and pulse detection mode are not available. by default all three axes are enabled. x a nd/or y and/or z can be disabled. there is a choice between detecting an absolute signal or a positive or negative only signal on the enabled axes . there is also a choice between doing a detection for motion where x or y or z > threshold vs. doing a det ection for freefall where x & y & z < threshold. $16: mode control register (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit -- drpd spi3w ston glvl[1] glvl[0] mode[1] mode[0] function 0 0 0 0 0 0 0 0 default table 5. configuring the g-select for 8-bit output using register $16 with glvl[1:0] bits. glvl [1:0] g-range sensitivity 00 8g 16 lsb/g 01 2g 64 lsb/g 10 4g 32 lsb/g table 6. configuring the mode using register $16 with mode[1:0] bits. mode [1:0] function 00 standby mode 01 measurement mode 10 level detection mode 11 pulse detection mode sensors 10 freescale semiconductor MMA7456L level detection when in level or pulse detection mode, it is not advisable to read the xyz measurements becaus e this can conflict with timing. the interrupts for level and pulse detection are at 600 hz, while m easurement mode is at 125 hz. it is best to exit the pulse/lev el mode before taking a measurement on the xyz. both the level detection and pulse detection modes can trigger an interrupt. typically one interrupt is assigned to either puls e detection or level detection. to detect both at the same time 2 interrupts are required. the level detection mechanism has no timers associated with it. once a set acceleration level is reac hed the interrupt pin will go high and remain high until the in terrupt pin is cleared (see assigning, clearing & detecting interrupts ). by default all three axes are enabled and the detection range is 8g only. x and/or y and/ or z can be disabled. there is a choic e between detecting an absolute signal or a positive or negative only signal on the enabled axes. there is also a choice between doing a detection for motion where x or y or z > threshold vs. doing a detection for freefall where x& y & z < threshold. $18: control 1 (read/write) setting the detection axes for x, y and z this allows the user to define how many axes to use for dete ction. all axes are enabled by default. to disable write 1. xda: disable x yda: disable y zda: disable z $19: control 2 (read/write) motion detection (or condition) or freefall detection (and condition ) ldpl = 0: level detection polarity is positive and detecting condition is or for all 3 axes. x or y or z > threshold ||x|| or ||y|| or ||z|| > threshold ldpl = 1: level detection polarity is negative detecting condition is and for all 3 axes. x and y and z < threshold ||x|| and ||y|| and ||z|| < threshold $18: control 1 (read/write): setting the threshold to be an integer value or an absolute value this allows the user to set the threshold to be absolute, or to be based on the threshold value as positive or negative. thopt = 0 absolute; thopt = 1 positive negative $1a : level detection threshold limit value (read/write) when an event is detected the interrupt pin (either int1 or in t2) will go high. the interrupt pin assignment is set up in regis ter $18, discussed in the assigning, clearing & detecting interrupts section. the detection status is monitored by the detection source register $0a. ldth[7:0]: level detection threshold value. if thopt bit in detect ion control register is ?0?, it is unsigned 7 bits value and ldth[7] should be ?0?. if thopt bit is ?1?, it is signed 8 bits value. d7 d6 d5 d4 d3 d2 d1 d0 reg $18 dfbw thopt zda yda xda intreg[1] intreg[0] intpin function 00000000default d7 d6 d5 d4 d3 d2 d1 d0 reg $19 -- -- -- -- -- drvo pdpl ldpl function 00000000default d7 d6 d5 d4 d3 d2 d1 d0 reg $18 dfbw thopt zda yda xda intreg[1] intreg[0] intpin function 00000000default d7 d6 d5 d4 d3 d2 d1 d0 reg $1a ldth[7] ldth[6] ldth[5] ldth[4] ldth[3] ldth[2] ldth[1] ldth[0] function 00000000default sensors freescale semiconductor 11 MMA7456L threshold detection for moti on and freefall conditions case 1: motion detection integer value: x >threshold or y >threshold or z > threshold reg $18 thopt=1; reg 19 ldpl=0, set threshold to 3g, which is 47 counts (16 counts/g). set register $1a ldth = $2f. case 2: motion detection absolute: ||x|| > threshold or ||y|| >threshold or ||z|| > threshold reg $18 thopt=0; reg 19 ldpl=0, set threshold to 3g, which is 47 counts (16 counts/g). set register $1a ldth = $2f. case 3: freefall detection integer value: x < threshold and y < threshold and z sensors freescale semiconductor 13 MMA7456L figure 4. single pulse detection case 2: freefall detection: x and y and z < pulse threshold for time > latency time for freefall detection, set in pulse mode. pdpl in register $19 =1 for ?and? freefall condition. the pulse threshold must be set in register $1b and the pulse latency time window must also be set using register $1d . all three axes must remain below the threshold longer than the time window for the interrupt to trigger. figure 5. freefall detection in pulse mode $1b: pulse detection thresh old limit value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 reg $1b pdth[7] pdth[6] pdth[5] pdth[4] pdth[3] pdth[2] pdth[1] pdth[0] function 00000000default $1d: latency time value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 reg $1d lt[7] lt[6] lt[5] lt[4] lt[3] lt[2] lt[1] lt[0] function 00000001default pulse detection time duration g th g int pin time time single pulse detection ($19 pdpl=0 indicating motion detection) time window for 2 nd pulse $1e tw=0 indicating single pulse *note there is up to 1.6ms delay on the interrupt signal sensors 14 freescale semiconductor MMA7456L case 3: double pulse detection: x or y or z > thr eshold for pulse duration1 < pdtime1, latency time, and x or y or z > threshold for pulse duration2 < pdtime2 for motion detection with double pulse the device must be in pulse mode. pdpl in register $19 =0 for ?or? motion condition. the pulse threshold must be set in register $1b and the pulse duration time window must also be set using register $1c . then the latency time (time between pulses) must be set in register $1d and then the second time window must be set in register $1e for the time window of the second puls e. the pulse must be detected before the time window closes for the interrupt to trigger. when any of the events are detec ted, the interrupt pin (either int1 or int2) w ill go high. the interrupt pin assignment is set up in register $18 , discussed in the assigning, clearing & detecting interrupts section on page 15 . the detection status is monitored by the detection source register $0a. figure 6. double pulse detection $1b: pulse detection threshold limit value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 reg $1b pdth[7] pdth[6] pdth[5] pdth[4] pdth[3] pdth[2] pdth[1] pdth[0] function 00000000default $1c: pulse duration value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 reg $1c pd[7] pd[6] pd[5] pd[4] pd[3] pd[2] pd[1] pd[0] function 00000001default $1d: latency time value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 reg $1d lt[7] lt[6] lt[5] lt[4] lt[3] lt[2] lt[1] lt[0] function 00000001default $1e: time window for 2 nd pulse value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 reg $1e tw[7] tw[6] tw[5] tw[4] tw[3] tw[2] tw[1] tw[0] function 00000000default pulse detection time window g th g latency time window (2 nd pulse ignored here) pulse detection time window for 2 nd pulse time time window >0 for 2 pulse detect int time double pulse detection ($19 pdpl=0 indicating motion detection) time window for 2 nd pulse $1e tw>0 indicating double pulse *note there is up to 1.6ms delay on the interrupt signal sensors freescale semiconductor 15 MMA7456L assigning, clearing & detecting interrupts assigning the interrupt pins is done in register $18. there are 3 combinations for the interrupt pins to be assigned which are outlined below in the table for intreg[1:0]. table 7. configuring the interrupt settings using register $18 with intreg[1:0] bits 00: 01: int1 register is detecting pulse while int2 is detecting level. 10: int1 register is detecting a single pulse and int2 is detecting single pulse (if 2 nd time window = 0) or if there is a latency time window and second time window>0 then int2 will detect the double pulse only. intpin: int1 pin is routed to int1 bit in detection source register ($0a) and int2 pin is routed to int2 bit in detection sourc e register ($0a). intpin: int2 pin is routed to int1 bit in detection source register ($0a) and int1 pin is routed to int2 bit in detection sourc e register ($0a). note: when intreg[1:0] =10 for the condition to detect single pulse on int1 and either single or double pulse on int2, int1 register bit can no longer be cleared by se tting clr_int1 bit. it is cleared by setti ng clr_int2 bit. in this case, setting clr _int2 clears both int1 and int2 register bits and resets the dete ction operation. follow the exampl e given for clearing the interrupt s. clearing the interrupt pins: register $17 clr_int1 1: clear ?int1? 0: do not clear ?int1? clr_int2 1: clear ?int2? 0: do not clear ?int2? after interrupt has triggered due to a detec tion, the interrupt pin (int1 or int2) need to be cleared by writing a logic 1. th en the interrupt pin should be enabled to trigger the next detection by setting it to a logic 0. this example is to show how to reset the interrupt flags void clearintlatch(void) { iic_bytewrite(intrst, 0x03); iic_bytewrite(intrst, 0x00); } $18 control 1 register d7 d6 d5 d4 d3 d2 d1 d0 reg $18 dfbw thopt zda yda xda intreg[1] intreg[0] intpin function 00000000default intreg[1:0] ?int1? register bit ?int2? register bit 00 level detection pulse detection 01 pulse detection level detection 10 single pulse detection single or double pulse detection $17: interrupt latc h reset (read/write) d7 d6 d5 d4 d3 d2 d1 d0 reg $17 -- -- -- -- -- -- clr_int2 clr_int1 function 00000000default sensors 16 freescale semiconductor MMA7456L detecting interrupts ldx 1: level detection event is detected on x-axis 0: level detection event is not detected on x-axis ldy 1: level detection event is detected on y-axis 0: level detection event is not detected on y-axis ldz 1: level detection event is detected on z-axis 0: level detection event is not detected on z-axis pdx 1: 1 st pulse is detected on x-axis 0: 1 st pulse is detected on x-axis pdy 1: 1 st pulse is detected on y-axis 0: 1 st pulse is detected on y-axis pdz 1: 1 st pulse is detected on z-axis 0: 1 st pulse is detected on z-axis int1 1: interrupt assigned by intr g[1:0] bits in control 1 register ($18) and is detected 0: interrupt assigned by intrg[1:0] bits in control 1 register ($18) and is not detected int2 1: interrupt assigned by intr g[1:0] bits in control 1 register ($18) and is detected 0: interrupt assigned by intr g[1:0] bits in control 1 register ($18) and is not detected digital interface the MMA7456L has both an i 2 c and spi digital output available for a communication interface. cs pin is used for selecting the mode of communication. when cs is low, spi communication is selected. when cs is high, i 2 c communication is selected. note: it is recommended to disable i 2 c during spi communication to avoid communication errors between devices using a dif- ferent spi communication protocol. to disable i 2 c, set the i 2 cdis bit in i 2 c device address register using spi. i 2 c slave interface i 2 c is a synchronous serial communication between a master devic e and one or more slave devices. the master is typically a microcontroller, which provides the serial clock signal and addresses the slave device(s) on the bus. the MMA7456L communi- cates only in slave operation where the device address is $1d. mu ltiple read and write modes are available. the protocol suppor ts slave only operation. it does not support hs mode, ? 10-bit addressing?, ?general call? and: ?start byte?. single byte read the MMA7456L has an 10-bit adc that can sample, convert and retu rn sensor data on request. the transmission of an 8-bit command begins on the falling edge of scl. after the eight clo ck cycles are used to send the command, note that the data re- turned is sent with the msb fi rst once the data is received. figure 7 shows the timing diagram for the accelerometer 8-bit i 2 c read operation. the master (or mcu) transmits a start condit ion (st) to the MMA7456L, slave address ($1d), with the r/w bit set to ?0? for a write, and the MMA7456L sends an acknowledgemen t. then the master (or mcu) tr ansmits the 10-bit address of the register to read and the MMA7456L sends an acknowledgemen t. the master (or mcu) transmits a repeated start condition (sr) and then addresses the MMA7456L ($1d) with the r/w bit set to ?1? for a read from the previously selected register. the slave then acknowledges and transmits the data from the req uested register. the master does not acknowledge (nak) it re- ceived the transmitted data, but transmits a stop condition to end the data transfer. multiple bytes read the MMA7456L automatically increments the received register add ress commands after a read command is received. therefore, after following the steps of a single byte read, multiple bytes of data can be read from sequential registers after each mma745 6l acknowledgment (ak) is received until a nack is received from the master followed by a stop condition (sp) signalling an end of transmission. see figure 8 . $0a: detection source register (read only) d7 d6 d5 d4 d3 d2 d1 d0 reg $0a ldx ldy ldz pdx pdy pdz int2 int1 function 00000000default sensors freescale semiconductor 17 MMA7456L single byte write to start a write command, the master transmits a start condition (st) to the MMA7456L, slave address ($1d) with the r/w bit set to ?0? for a write, the MMA7456L sends an a cknowledgement. then the master (mcu) tr ansmits the 8-bit address of the register to write to, and the MMA7456L sends an ackn owledgement. then the master (or mcu) tran smits the 8-bit data to write to the designated register and the MMA7456L sends an acknowledgement that it has received the data. since this transmission is com- plete, the master transmits a stop condition (sp) to the data transfer. the data sent to t he MMA7456L is now stored in the ap- propriate register. see figure 9 . figure 7. single byte read - the master is reading one address from the MMA7456L figure 8. multiple bytes read - the master is read ing multiple sequential registers from the MMA7456L figure 9. single byte write - th e master (mcu) is writing to a single register of the MMA7456L multiple bytes write the MMA7456L automatically increments the received register addr ess commands after a write comm and is received. therefore, after following the steps of a single byte write, multiple bytes of dat a can be written to sequential registers after each mma7 456l acknowledgment (ack) is received. see figure 10 . figure 10. multiple byte writes - the master (mcu) is writing to multiple sequential registers of the MMA7456L sensors 18 freescale semiconductor MMA7456L spi slave interface the MMA7456L also uses serial peripheral interface communicati on as a digital communication. the spi communication is pri- marily used for synchronous serial communication between a master device and one or more slave devices. see figure 16 for an example of how to configure one master with one mma745x l device. the MMA7456L is always operated as a slave device. typically, the master device would be a microcontroller whic h would drive the clock (spc) and chip select (cs) signals. the spi interface consists of two control lines and two data li nes: cs, spc, sdi, and sdo. the cs, also known as chip select, is the slave device enable which is controlle d by the spi master. cs is driven low at the start of a transmission. cs is then d riven high at the end of a transmission. spc is the serial port clock wh ich is also controlled by the spi master. sdi and sdo are the serial port data input and the serial port data output. the sd i and sdo data lines are driven at the falling edge of the spc an d should be captured at the rising edge of the spc. read and write register commands are completed in 16 clock pulses or in multiples of 8, in the ca se of a multiple byte read/wri te. spi read operation a spi read transfer consists of a 1-bit read/write signal, a 6-bi t address, and 1-bit don?t care bit. (1-bit r/w=0 + 6-bits add ress + 1-bit don?t care). the data to read is sent by the spi interface during the next transfer. see figure 11 and figure 12 for the timing diagram for an 8-bit read in 4 wire and 3 wire modes, respectively. spi write operation in order to write to one of the 8-bit regist ers, an 8-bit write command must be sent to the MMA7456L. the write command consist s of an msb (0=read, 1=write) to indicate writing to the mma7 456l register, followed by a 6-bit address and 1 don?t care bit. the command should then be followed the 8-bit data transfer. see figure 12 for the timing diagram for an 8-bit data write. figure 11. spi timing diagram for 8-bit register read (4 wire mode) figure 12. spi timing diagram for 8-bit register read (3 wire mode) figure 13. spi timing diag ram for 8-bit register write (3 wire mode) sensors freescale semiconductor 19 MMA7456L basic connections pin descriptions figure 14. pinout description table 8. pin descriptions recommended pcb layout for interfacin g accelerometer to microcontroller figure 15. i 2 c connection to mcu 1 2 3 4 5 6 7 8 9 10 11 12 13 14 avdd gnd dvdd_io scl/spc cs int1/drdy int2 n/c sdo sda/sdi/sdo n/c iaddr0 n/c gnd top view pin # pin name description pin status 1 dvdd_io digital power for i/o pads input 2 gnd ground input 3 n/c no internal connection. leave unconnected or connect to ground. input 4 iaddr0 i 2 c address bit 0 input 5 gnd ground input 6 avdd analog power input 7cs spi enable (0), i 2 c enable (1) input 8 int1/drdy interrupt 1/ data ready output 9 int2 interrupt 2 output 10 n/c no internal connection. leave unconnected or connect to ground. input 11 n/c no internal connection. leave unconnected or connect to ground. input 12 sdo spi serial data output output 13 sda/sdi/sdo i 2 c serial data (sda), spi serial data input (sdi), 3-wire interface serial data output (sdo) open drain/ input/ output 14 scl/spc i 2 c serial clock (scl), spi serial clock (spc) input gnd vdd vdd_io scl sda int2 int1/drdy mcu 0.1uf 0.1uf address set bit (bit 0) vdd vdd 10uf 10uf 10k ? 10k ? gnd vdd vdd_io scl sda int2 int1/drdy mcu 0.1uf 0.1uf address set bit (bit 0) vdd vdd 10uf 10uf 10k ? 10k ? r2 r1 vdd vdd vdd vdd sensors 20 freescale semiconductor MMA7456L figure 16. spi connection to mcu notes: 1. use a 0.1 f and a 10 f capacitor on av dd to and dv dd _io to decouple the power source. 2. physical coupling distance of the accelerometer to the microcontroller should be minimal. 3. pcb layout of power and ground should not couple power supply noise. 4. accelerometer and microcontroller should not be a high current path. 5. any external power supply switching frequency should be sele cted such that they do not interfere with the internal accelerometer sampling frequency (sampling frequency). this will prevent aliasing errors. 6. physical distance of the two gnd pins (pin2 and pin5 ) tied together should be at the shortest distance. gnd vdd vdd_io spc sda/sdi/sdo sdo int2 int1/drdy mcu 0.1uf 0.1uf 10uf 10uf gnd vdd vdd_io spc sda/sdi/sdo sdo int2 int1/drdy mcu 0.1uf 0.1uf 10uf 10uf vdd vdd slc/spc sensors freescale semiconductor 21 MMA7456L register definitions signed byte data (2?s compliment): 0g = 10?h000 reading low byte xoutl latches high byte xouth to allow 10-bit reads. xouth should be read directly following xoutl read. table 9. user register summary address name definition bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 $00 xoutl 10 bits output value x lsb xout[7] xout[6] xout[5] xout[4] xout[3] xout[2] xout[1] xout[0] $01 xouth 10 bits output value x msb -- -- -- -- -- -- xout[9] xout[8] $02 youtl 10 bits output value y lsb yout[7] yout[6] yout[5] yout[4] yout[3] yout[2] yout[1] yout[0] $03 youth 10 bits output value y msb -- -- -- -- -- -- yout[9] yout[8] $04 zoutl 10 bits output value z lsb zout[7] zout[6] zout[5] zout[4] zout[3] zout[2] zout[1] zout[0] $05 zouth 10 bits output value z msb -- -- -- -- -- -- zout[9] zout[8] $06 xout8 8 bits output value x xout[7] xout[6] xout[5] xout[4] xout[3] xout[2] xout[1] xout[0] $07 yout8 8 bits output value y yout[7] yout[6] yout[5] yout[4] yout[3] yout[2] yout[1] yout[0] $08 zout8 8 bits output value z zout[7] zout[6] zout[5] zout[4] zout[3] zout[2] zout[1] zout[0] $09 status status registers -- -- -- -- -- perr dovr drdy $0a detsrc detection source registers ldx ldy ldz pdx pdy pdz int2 int1 $0b tout ?temperature output value? (optional) tmp[7] tmp[6] tmp[5] tmp[4] tmp[3] tmp[2] tmp[1] tmp[0] $0c (reserved) -- -- -- -- -- -- -- -- $0d i2cad i 2 c device address i2cdis dad[6] dad[5] dad[4] dad[3] dad[2] dad[1] dad[0] $0e usrinf user information (optional) ui[7] ui[6] ui[5] ui[4] ui[3] ui[2] ui[1] ui[0] $0f whoami ?who am i? value (optional) id[7] id[6] id[5] id[4] id[3] id[2] id[1] id[0] $10 xoffl offset drift x value (lsb) xoff[7] xoff[6] xoff[5] xoff[4] xoff[3] xoff[2] xoff[1] xoff[0] $11 xoffh offset drift x value (msb) -- -- -- -- -- xoff[10] xoff[9] xoff[8] $12 yoffl offset drift y value (lsb) yoff[7] yoff[6] yoff[5] yoff[4] yoff[3] yoff[2] yoff[1] yoff[0] $13 yoffh offset drift y value (msb) -- -- -- -- -- yoff[10] yoff[9] yoff[8] $14 zoffl offset drift z value (lsb) zoff[7] zoff[6] zoff[5] zoff[4] zoff[3] zoff[2] zoff[1] zoff[0] $15 zoffh offset drift z value (msb) -- -- -- -- -- zoff[10] zoff[9] zoff[8] $16 mctl mode control -- drpd spi3w ston glvl[1] glvl[0] mod[1] mod[0] $17 intrst interrupt latch reset -- -- -- -- -- -- clrint2 clrint1 $18 ctl1 control 1 dfbw thopt zda yda xda intrg[1] intrg[0] intpin $19 ctl2 control 2 -- -- -- -- -- drvo pdpl ldpl $1a ldth level detection threshold limit value ldth[7] ldth[6] ldth[5] ldth[4] ldth[3] ldth[2] ldth[1] ldth[0] $1b pdth pulse detection threshold limit value pdth[7] pdth[6] pdth[5] pdth[4] pdth[3] pdth[2] pdth[1] pdth[0] $1c pw pulse duration value pd[7] pd[6] pd[5] pd[4] pd[3] pd[2] pd[1] pd[0] $1d lt latency time value lt[7] lt[6] lt[5] lt[4] lt[3] lt[2] lt[1] lt[0] $1e tw time window for 2 nd pulse value tw[7] tw[6] tw[5] tw[4] tw[3] tw[2] tw[1] tw[0] $1f (reserved) -- -- -- -- -- -- -- -- $00: 10bits output value x lsb (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit xout [7] xout [6] xout [5] xout [4] xout [3] xout [2] xout [1] xout[0] function 0 0 0 0 0 0 0 0 default sensors 22 freescale semiconductor MMA7456L signed byte data (2?s compliment): 0g = 10?h000 reading low byte xoutl latches high byte xouth to allow 10-bit reads. xouth should be read directly following xoutl read. signed byte data (2?s compliment): 0g = 10?h000 reading low byte youtl latches high byte youth to allow coherent 10-bit reads. youth should be read directly following youtl. signed byte data (2?s compliment): 0g = 10?h000 reading low byte zoutl latches high byte zouth to allow coherent 10-bit reads. zouth should be read directly following zoutl. signed byte data (2?s compliment): 0g = 10?h000 reading low byte zoutl latches high byte zouth to allow coherent 10-bit reads. zouth should be read directly following zoutl. signed byte data (2?s compliment): 0g = 8?h00 signed byte data (2?s compliment): 0g = 8?h00 $01: 10bits output value x msb (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit -- -- -- -- -- -- xout [9] xout[8] function 0 0 0 0 0 0 0 0 default $02: 10bits output value y lsb (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit yout [7] yout [6] yout [5] yout [4] yout [3] yout [2] yout [1] yout[0] function 0 0 0 0 0 0 0 0 default $03: 10bits output value y msb (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit -- -- -- -- -- -- yout [9] yout[8] function 0 0 0 0 0 0 0 0 default $04: 10bits output value z lsb (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit zout [7] zout [6] zout [5] zout [4] zout [3] zout [2] zout [1] zout[0] function 0 0 0 0 0 0 0 0 default $05: 10bits output value x msb (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit -- -- -- -- -- -- zout [9] zout[8] function 0 0 0 0 0 0 0 0 default $06: 8bits output value x (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit xout[7] xout [6] xout [5] xout [4] xout [3] xout [2] xout [1] xout [0] function 0 0 0 0 0 0 0 0 default $07: 8bits output value y (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit yout[7] yout [6] yout [5] yout [4] yout [3] yout [2] yout [1] yout [0] function 0 0 0 0 0 0 0 0 default sensors freescale semiconductor 23 MMA7456L signed byte data (2?s compliment): 0g = 8?h00 drdy 1: data is ready 0: data is not ready dovr 1: data is over written 0: data is not over written perr 1: parity error is de tected in trim data. then, self-test is dis- abled 0: parity error is not detected in trim data ldx 1: level detection detected on x-axis 0: level detection not detected on x-axis ldy 1: level detection detected on y-axis 0: level detection not detected on y-axis ldz 1: level detection detected on z-axis 0: level detection not detected on z-axis pdx *note 1: pulse is detected on x-axis at single pulse detection 0: pulse is not detected on x- axis at single pulse detection pdy *note 1: pulse is detected on y-axis at single pulse detection 0: pulse is not detected on y-axis at single pulse detection pdz *note 1: pulse is detected on z-axis at single pulse detection 0: pulse is not detected on z-axis at single pulse detection note: this bit value is not valid at double pulse detection int1 1: interrupt assigned by intrg[1:0] bits in control 1 register ($18) and is detected 0: interrupt assigned by intrg[1:0] bits in control 1 register ($18) and is not detected int2 1: interrupt assigned by intrg[1:0] bits in control 1 register ($18) and is detected 0: interrupt assigned by intrg[1:0] bits in control 1 register ($18) and is not detected *note: must define drdy to be an output to either int1 or not. this is done through bit drpd located in register $16. $08: 8bits output value z (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit zout[7] zout [6] zout [5] zout [4] zout [3] zout [2] zout [1] zout [0] function 0 0 0 0 0 0 0 0 default $09: status register (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit -- -- -- -- -- perr dovr drdy function 0 0 0 0 0 0 0 0 default $0a: detection source register (read only) d7 d6 d5 d4 d3 d2 d1 d0 bit ldx ldy ldz pdx pdy pdz int2 int1 function 0 0 0 0 0 0 0 0 default sensors 24 freescale semiconductor MMA7456L i2cdis 0: i 2 c and spi are available. 1: i 2 c is disabled. dvad[6:0]: i 2 c device address ui2[7:0]: user information signed byte data (2?s compliment): user level offset trim value for x-axis * bit weight is for 8g 10bit data output. typica l value for reference only. variation is specified in ?electrical characteristics ? section. signed byte data (2?s compliment): user level offset trim value for x-axis signed byte data (2?s compliment): user level offset trim value for y-axis * bit weight is for 2g 8bit data output. typica l value for reference only. variation is specified in ?electrical characteristics? section. $0d: i 2 c device address (bit 6-0: read only, bit 7: read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit i2cdis dvad[6] dvad[5] dvad[4] dvad[3] dvad[2] dvad[1] dvad[0] function 0 0 0 1 1 1 0 1 default $0e: user information (read only: optional) d7 d6 d5 d4 d3 d2 d1 d0 bit ui[7] ui[6] ui[5] ui[4] ui[3] ui[2] ui[1] ui[0] function 0/otp 0/otp 0/otp 0/otp 0/otp 0/otp 0/otp 0/otp default $0f: ?who am i? valu e (read only : optional) d7 d6 d5 d4 d3 d2 d1 d0 bit id[7] id [6] id [5] id [4] id [3] id [2] id [1] id [0] function 0/otp 0/otp 0/otp 0/otp 0/otp 0/otp 0/otp 0/otp default $10: offset drift x lsb (read/write) the following offset drift registers are used for setting and storing the offset calibrations to eliminate the 0g offset. pleas e refer to freescale application note an3745 for detailed instructio ns on the process to set and store the calibration values. d7 d6 d5 d4 d3 d2 d1 d0 bit xoff[7] xoff [6] xoff [5] xoff [4] xoff [3] xoff [2] xoff [1] xoff [0] function 0 0 0 0 0 0 0 0 default bit xoff[7] xoff[6] xoff[5] xoff[4] xoff[3] xoff[2] xoff[1] xoff[0] weight* 64 lsb 32 lsb 16 lsb 8 lsb 4 lsb 2 lsb 1 lsb 0.5 lsb $11: offset drift x msb (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit -- -- -- -- -- xoff [10] xoff [9] xoff [8] function 0 0 0 0 0 0 0 0 default $12: offset drift y lsb (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit yoff[7] yoff [6] yoff [5] yoff [4] yoff [3] yoff [2] yoff [1] yoff [0] function 0 0 0 0 0 0 0 0 default bit yoff[7] yoff[6] yoff[5] yoff[4] yoff[3] yoff[2] yoff[1] yoff[0] weight* 64 lsb 32 lsb 16 lsb 8 lsb 4 lsb 2 lsb 1 lsb 0.5 lsb sensors freescale semiconductor 25 MMA7456L signed byte data (2?s compliment): user level offset trim value for y-axis * bit weight is for 2g 8bit data output. typica l value for reference only. variation is specified in ?electrical characteristics? section. signed byte data (2?s compliment): user level offset trim value for z-axis * bit weight is for 2g 8bit data output. typica l value for reference only. variation is specified in ?electrical characteristics? section. signed byte data (2?s compliment): user level offset trim value for z-axis * bit weight is for 2g 8bit data output. typica l value for reference only. variation is specified in ?electrical characteristics? section. table 10. configuring the g-select for 8-bit output using register $16 with glvl[1:0] bits. glvl [1:0] 00: 8g is selected for measurement range. 10: 4g is selected for measurement range. 01: 2g is selected for measurement range. ston 0: self-test is not enabled 1: self-test is enabled spi3w 0: spi is 4 wire mode 1: spi is 3 wire mode drpd 0: data ready status is output to int1/drdy pin 1: data ready status is not output to int1/drdy pin $13: offset drift y msb (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit -- -- -- -- -- yoff [10] yoff [9] yoff [8] function 0 0 0 0 0 0 0 0 default bit yoff[10] yoff[9] yoff[8] weight* polarity 256 lsb 128 lsb $14: offset drift z lsb (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit zoff[7] zoff[6] zoff[5] zoff[4] zoff[3] zoff[2] zoff[1] zoff[0] function 0 0 0 0 0 0 0 0 default bit zoff[7] zoff[6] zoff[5] zoff[4] zoff[3] zoff[2] zoff[1] zoff[0] weight* 64 lsb 32 lsb 16 lsb 8 lsb 4 lsb 2 lsb 1 lsb 0.5 lsb $15: offset drift z msb (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit -- -- -- -- -- zoff[10] zoff[9] zoff[8] function 0 0 0 0 0 0 0 0 default bit zoff[10] zoff[9] zoff[8] weight* polarity 256 lsb 128 lsb $16: mode control register (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit -- drpd spi3w ston glvl[1] glvl[0] mode[1] mode[0] function 0 0 0 0 0 0 0 0 default glvl [1:0] g-range sensitivity 00 8g 16 lsb/g 01 2g 64 lsb/g 10 4g 32 lsb/g sensors 26 freescale semiconductor MMA7456L clr_int1 1: clear ?int1? and ldx/ldy/ ldz or pdx/pdy/pdz bits in detection source register ($0a) depending on control1($18) intreg[1:0] setting. 0: do not clear ?int1? ldx/ld y/ldz or pdx/pdy/pdz bits in detection source register ($0a) clr_int2 1: clear ?int2? and ldx/ldy/ ldz or pdx/pdy/pdz bits in detection source register ($0a) depending on control1($18) intreg[1:0] setting. 0: do not clear ?int2? and ldx/ldy/ldz or pdx/pdy/pdz bits in detection source register ($0a) . 01: int1 register is detecting pulse while int2 is detecting level. 10: int1 register is detecting a single pulse and int2 is detecting single pulse (if 2 nd time window = 0) or if there is a latency time window and second time window>0 then int2 will detect the double pulse only. intpin: int1 pin is routed to int1 bit in detection source register ($0a) and int2 pin is routed to int2 bit in detection sourc e register ($0a). intpin: int2 pin is routed to int1 bit in detection source register ($0a) and int1 pin is routed to int2 bit in detection sourc e register ($0a). note: when intreg[1:0] =10 for the condition to detect single pulse on int1 and either single or double pulse on int2, int1 register bit can no longer be cleared by se tting clr_int1 bit. it is cleared by setti ng clr_int2 bit. in this case, setting clr _int2 clears both int1 and int2 register bits and resets the detection operation. xda 1: x-axis is disabled for detection. 0: x-axis is enabled for detection. yda 1: y-axis is disabled for detection. 0: y-axis is enabled for detection. zda 1: z-axis is disabled for detection. 0: z-axis is enabled for detection. thopt (this bit is valid for level detection only, not valid for pulse detection) 0: threshold value is absolute only 1: integer value is available. dfbw 0: digital filter band width is 62.5 hz 1: digital filter band width is 125 hz ldpl 0: level detection polarity is positive and detecting condition is or 3 axes. 1: level detection polarity is negative detecting condition is and 3 axes. pdpl 0: pulse detection polarity is positive and detecting condition is or 3 axes. 1: pulse detection polarity is negative and detecting condition is and 3 axes. $17: interrupt latch reset (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit -- -- -- -- -- -- clr_int2 clr_int1 function 0 0 0 0 0 0 0 0 default $18 control 1 (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit dfbw thopt zda yda xda intreg[1] intreg[0] intpin function 00000000default table 11. configuring the interrupt settings using register $18 with intreg[1:0] bits intreg[1:0] ?int1? register bit ?int2? register bit 00 level detection pulse detection 01 pulse detection level detection 10 single pulse detection single or double pulse detection $19: control 2 (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit drvo pdpl ldpl function 0 0 0 0 0 0 0 0 default sensors freescale semiconductor 27 MMA7456L drvo 0: standard drive strength on sda/sdo pin 1: strong drive strength on sda/sdo pin ldth[7:0]: level detection threshold value. if thopt bit in detect ion control register is ?0?, it is unsigned 7 bits value and ldth[7] should be ?0?. if thopt bit is ?1?, it is signed 8 bits value. pdth[6:0]: pulse detection threshold value (unsigned 7 bits). xpdth: this bit should be ?0?. min: pd[7:0] = 4?h01 = 0.5 ms max: pd[7:0] = 4?hff = 127 ms 1 lsb = 0.5 ms min: lt[7:0] = 8?h01 = 1 ms max: lt[7:0] = 8?hff = 255 ms 1 lsb = 1 ms min: tw[7:0] = 8?h01 = 1 ms (single pulse detection) max: tw[7:0] = 8?hff = 255 ms 1 lsb = 1 ms $1a: level detection threshold limit value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit ldth[7] ldth[6] ldth[5] ldth[4] ldth[3] ldth[2] ldth[1] ldth[0] function 0 0 0 0 0 0 0 0 default $1b: pulse detection thresh old limit value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit xpdth pdth[6] pdth[5] pdth[4] pdth[3] pdth[2] pdth[1] pdth[0] function 0 0 0 0 0 0 0 0 default $1c: pulse duration value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit pd[7] pd[6] pd[5] pd[4] pd[3] pd[2] pd[1] pd[0] function 0 0 0 0 0 0 0 0 default $1d: latency time value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit lt[7] lt[6] lt[5] lt[4] lt[3] lt[2] lt[1] lt[0] function 0 0 0 0 0 0 0 0 default $1e: time window for 2nd pulse value (read/write) d7 d6 d5 d4 d3 d2 d1 d0 bit tw[7] tw[6] tw[5] tw[4] tw[3] tw[2] tw[1] tw[0] function 0 0 0 0 0 0 0 0 default sensors 28 freescale semiconductor MMA7456L sensing direction and output response the following figure shows sensing direction and the output response for 2g mode. figure 17. sensing direction and output response at 2g mode table 12. acceleration vs. output (8-bit data) fs mode acceleration output 2g mode -2g $80 -1g $c1 0g $00 +1g $3f +2g $7f 4g mode -4g $80 -1g $e1 0g $00 +1g $1f +4g $7f 8g mode -8g $80 -1g $f1 0g $00 +1g $0f +8g $7f side view x out @0g=$00 y out @ +1g = $3f z out @0g=$00 x out @ +1g = $3f y out @0g=$00 z out @0g=$00 x out @ -1g = $c1 y out @0g=$00 z out @ 0g = $00 1 65432 13 12 11 10 9 8 14 7 x out @0g=$00 y out @ -1g = $c1 z out @0g=$00 direction of earth's gravity field.* top view x out @0g=$00 y out @0g=$00 z out @ -1g = $c1 x out @0g=$00 y out @0g=$00 z out @ +1g = $3f 1 65432 13 12 11 10 9 8 14 7 16 5 4 3 2 13 12 11 10 9 8 14 7 1 65432 13 12 11 10 9 8 14 7 to p to p bottom bottom * when positioned as shown, the earth?s grav ity will result in a positive 1g output. sensors freescale semiconductor 29 MMA7456L minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the su rface mount packages must be the correct size to ensure proper solder connec tion interface between the board and the package. with the correct footprint, the packages will self-align when subj ected to a solder reflow process. it is always recommended to design boards with a solder mask layer to avoid bridging and shorting between solder pads. soldering and mounting guid elines for the lga accelerometer sensor to a pc board these guideline are for soldering and mounting the lga package iner tial sensors to printed circuit boards (pcbs). the purpose is to minimize the stress on the package after board mounting. the MMA7456L digital output accelerometer uses the land grid array (lga) package platform. this section describes suggested me thods of soldering these devices to the pc board for con- sumer applications. figure 18 shows the recommended pcb land pattern for the package. figure 18. recommended pcb land pattern for the 5 x 3 mm lga package sensors 30 freescale semiconductor MMA7456L overview of solder ing considerations information provided here is based on experiments executed on lga devices. they do not repr esent exact conditions present at a customer site. hence, information herein should be used as a guidance only and process and design optimizations are rec- ommended to develop an application specific solution. it shoul d be noted that with the proper pcb footprint and solder stenci l designs the package will self-align during the solder reflow process. the following are the recommended guidelines to follow for mounting lga sensors for consumer applications. pcb mounting recommendations 1. the pcb land should be designed with non solder mask defined (nsmd) as shown in figure 21 . 2. no additional metal pattern underneath package as shown in figure 20 . 3. pcb land pad is 0.9 mm x 0.6 mm which is the si ze of the package pad plus 0.1 mm as shown in figure 21 . 4. the solder mask opening is equal to the size of the pcb land pad plus an extra 0.1 mm as shown in figure 21 . 5. the stencil aperture size is e qual to the pcb land pad ? 0.025mm. figure 19. incorrect pcb top metal pattern under package figure 20. correct pcb top metal pattern under package figure 21. recommended pcb land pad, solder mask, and signal trace near package design exam p le of 2 la y er pcb top metal pattern under package area via structure under lga p acka g e w/ solder pcb top metal layer top metal pattern under package area via structure under package area 0.8 mm 0.5 mm pcb land pattern - nsmd sm opening = pcb land pad + 0.1mm = 1.0 x 0.7mm sq. cu: 0.9 x 0.6 mm sq. signal trace near package: 0.1mm width and min. 0.5mm length are recommended. wider trace can be continued after these. wider trace pad dimension by package sensors freescale semiconductor 31 MMA7456L figure 22. stencil design guidelines 6. do not place any components or vias at a distance less than 2 mm from the package land area. this may cause additional package stress if it is too close to the package land area. 7. signal traces connected to pads should be as symmetric as possible. put dummy traces on nc pads in order to have same length of exposed trace for all pads. signa l traces with 0.1 mm width and min. 0.5 mm length for all pcb land pads near the package are recommended as shown in figure 21 and figure 22 . wider trace can be continued after the 0.5 mm zone. 8. use a standard pick and place process and equi pment. do not us a hand soldering process. 9. it is recommended to use a cleanable solder paste with an additional cleaning step after smt mount. 10. do not use a screw down or stacking to fix the pcb into an enclosure because this could bend the pcb putting stress on the package. 11. the pcb should be rated for the multiple lead-f ree reflow condition with max 260c temperature. please cross reference with the device data sheet for mo unting guidelines specific to the exact device used. freescale lga sensors are compliant with restrictions on hazardous substances (rohs), having halide free molding compound (green) and lead-free terminations. these terminations are compat ible with tin-lead (sn-pb) as well as tin-silver-copper (sn-ag - cu) solder paste soldering processes. reflow profiles applicable to those processes can be used successfully for soldering the devices. 14x0.575mm stencil opening = pcb landing pad -0.025mm = 0.575mmx0,875mm package footprint signal trace near package 10x0.8mm 14x0.875mm sensors 32 freescale semiconductor MMA7456L figure 23. MMA7456L temperature co efficient of offset (tco) and temperature coefficient of sensitivity (tcs) distribution charts figure 24. MMA7456L current distribution charts lsl usl target -0.02 -0.01 0 0.01 0.02 ysens_%/degreec_-40to85 lsl usl target -0.03 -0.02 -0.01 0 0.01 0.02 0.03 zsens_%/degreec_-40to85 lsl usl target -3 -2 -1 0 1 2 3 zoff_mg/de gre ec_-40to85 ls l usl target -3 -2 -1 0 1 2 3 yoff_mg/degree c_-40to85 lsl usl target -0.02 -0.01 0 0.01 0.02 xsens_%/degreec_-40to85 lsl usl target -3 -2 -1 0 1 2 3 xoff_mg/degreec_-40to85 sensors freescale semiconductor 33 MMA7456L package dimensions case 1977-01 issue a 14-lead lga sensors 34 freescale semiconductor MMA7456L package dimensions case 1977-01 issue a 14-lead lga MMA7456L rev. 1 10/2008 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc. 2008. all rights reserved. rohs-compliant and/or pb-free versions of freesc ale products have the functi onality and electrical characteristics of their non-rohs-compliant and/or non-pb-free counterparts. for further information, see http:/www.freescale.com or contact your freescale sales representative. for information on freescale?s environmental products program, go to http://www.freescale.com/epp. how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor china ltd. exchange building 23f no. 118 jianguo road chaoyang district beijing 100022 china +86 010 5879 8000 support.asia@freescale.com for literature requests only: freescale semiconductor lite rature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or +1-303-675-2140 fax: +1-303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com sensors 36 freescale semiconductor MMA7456L |
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